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Reducing CTE Mismatch Defects in Flip Chip Reflow

Reducing CTE Mismatch Defects in Flip Chip Reflow

US Tech – May 2019 – In this article Thomas Tong and co-authors explain the use of the TrueFlat reflow oven technology to keep very thin substrates flat during reflow. This is an important consideration for flip chip processes where CTE mismatch is an inherent process challenge.

  • Date: April 26, 2019
  • Type: application/pdf
  • Size: (418.9 KB)

Learn more about substrate flatness during reflow

This paper provides an overview of the need for and use of flatness techniques to reduce bowing during the thermal processing of very thin substrates.   Specifically, this application covers flip chip reflow using a Pyramax Trueflat reflow oven.  The authors also highlight the controlled cooling and the affects of suction uniformity on thermal uniformity.